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UPD4217101V-80

Renesas Electronics Corp.

Renesas Electronics Corp. UPD4217101V-80
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.32.00.02
  • SB Code
    8542.32.00.15
  • I/O Type
    SEPARATE
  • Technology
    CMOS
  • JESD-30 Code
    R-PZIP-T24
  • Memory Width
    1
  • Organization
    16MX1
  • Package Code
    ZIP
  • JESD-609 Code
    e0
  • Package Shape
    RECTANGULAR
  • Package Style
    IN-LINE Meter
  • Surface Mount
    NO
  • Terminal Form
    THROUGH-HOLE
  • Memory Density
    16777216 bit
  • Memory IC Type
    NIBBLE MODE DRAM
  • Refresh Cycles
    2048
  • Terminal Pitch
    1.27 mm
  • Access Time-Max
    80 ns
  • Number of Words
    16777216 words
  • Terminal Finish
    Tin/Lead (Sn/Pb)
  • Temperature Grade
    COMMERCIAL
  • Terminal Position
    ZIG-ZAG
  • Number of Terminals
    24
  • Number of Words Code
    16M
  • Qualification Status
    Not Qualified
  • Package Body Material
    PLASTIC/EPOXY
  • Output Characteristics
    3-STATE
  • Package Equivalence Code
    ZIP24,.1
  • Operating Temperature-Max
    70 Cel
  • Operating Temperature-Min
    0 Cel
  • Supply Voltage-Nom (Vsup)
    5 V

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UPD4217101V-80
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UPD4217101V-80