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MN103SFA2R

Panasonic Corporation

Panasonic Corporation MN103SFA2R
  • ECCN
    3A991.a.2
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.25
  • SB Code
    8542.31.00.25
  • Bit Size
    32
  • Technology
    CMOS
  • Width (mm)
    18
  • Length (mm)
    18
  • Speed (MHz)
    60
  • ADC Channels
    YES
  • DAC Channels
    NO
  • DMA Channels
    YES
  • JESD-30 Code
    S-PQFP-G128
  • PWM Channels
    YES
  • Package Code
    QFP
  • Package Shape
    SQUARE
  • Package Style
    FLATPACK Meter
  • Surface Mount
    YES
  • Terminal Form
    GULL WING
  • Address Bus Width
    0
  • DLA Qualification
    Not Qualified
  • Terminal Position
    QUAD
  • Additional Feature
    ALSO AVAILABLE IN LQFP-128 PACKAGE
  • Number of I/O Lines
    82
  • Number of Terminals
    128
  • Program Memory Type
    FLASH
  • Terminal Pitch (mm)
    0.65
  • Package Body Material
    PLASTIC/EPOXY
  • Seated Height-Max (mm)
    2.85
  • Supply Voltage-Max (V)
    3.6
  • Supply Voltage-Min (V)
    2.7
  • Supply Voltage-Nom (V)
    3
  • External Data Bus Width
    0
  • Clock Frequency-Max (MHz)
    60
  • uPs/uCs/Peripheral ICs Type
    MICROCONTROLLER

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MN103SFA2R
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MN103SFA2R