VISHAY SILICONIX J110 | 搜芯易Sourcengine

VISHAY SILICONIX J110

生命周期状态
EOL
说明
JFET RECOMMENDED ALT 512-J110
类别
Semiconductors Transistors Other Transistors

ECCN
EAR99
ECCN Governance
EAR

JESD-30 Code
O-PBCY-T3
Configuration
SINGLE WITH BUILT-IN DIODE
JEDEC-95 Code
TO-226AA
JESD-609 Code
e0
Package Shape
ROUND
Package Style
CYLINDRICAL Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
FET Technology
JUNCTION
Operating Mode
DEPLETION MODE
Terminal Finish
TIN LEAD
Terminal Position
BOTTOM
Additional Feature
LOW INSERTION LOSS
Number of Elements
1
Number of Terminals
3
Qualification Status
Not Qualified
Package Body Material
PLASTIC/EPOXY
Polarity/Channel Type
N-CHANNEL
Transistor Application
SWITCHING
Feedback Cap-Max (Crss)
15 pF
Transistor Element Material
SILICON
Drain-source On Resistance-Max
18 ohm