Renesas Electronics Corp. ICS9DB801CGLF | 搜芯易Sourcengine

Renesas Electronics Corp. ICS9DB801CGLF

生命周期状态
Discontinued
RoHS
符合RoHS标准
REACH
REACH compliant
说明
PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48
类别
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Width
6.1 mm
Family
9DB
Length
12.5 mm
JESD-30 Code
R-PDSO-G48
Package Code
TSSOP
JESD-609 Code
e3
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
Terminal Pitch
0.5 mm
Terminal Finish
Matte Tin (Sn) - annealed
Seated Height-Max
1.2 mm
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Input Conditioning
DIFFERENTIAL
Number of Functions
1
Number of Terminals
48
Qualification Status
Not Qualified
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
8
Output Characteristics
3-STATE
Package Equivalence Code
TSSOP48,.3,20
Operating Temperature-Max
70 Cel
Operating Temperature-Min
0 Cel
Supply Voltage-Max (Vsup)
3.465 V
Supply Voltage-Min (Vsup)
3.135 V
Supply Voltage-Nom (Vsup)
3.3 V
Moisture Sensitivity Level
1
Number of Inverted Outputs
0
Same Edge Skew-Max (tskwd)
0.05 ns
Peak Reflow Temperature (Cel)
260
Time@Peak Reflow Temperature-Max (s)
30