Renesas Electronics Corp. ICS97ULP877YHLF-T | 搜芯易Sourcengine

Renesas Electronics Corp. ICS97ULP877YHLF-T

生命周期状态
Active
RoHS
符合RoHS标准
REACH
REACH compliant
说明
PLL Based Clock Driver, 97ULP Series, 10 True Output(s), 0 Inverted Output(s), PBGA52
类别
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
97ULP
Width (mm)
4.5
Length (mm)
7
JESD-30 Code
R-PBGA-B52
Package Code
VFBGA
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
GRID ARRAY, VERY THIN PROFILE, FINE PITCH Meter
Surface Mount
YES
Terminal Form
BALL
J-STD-609 Code
e1
fmax-Min (MHz)
350
Terminal Finish
TIN SILVER COPPER
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
BOTTOM
Input Conditioning
DIFFERENTIAL
Number of Functions
1
Number of Terminals
52
Terminal Pitch (mm)
0.65
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
10
Output Characteristics
3-STATE
Seated Height-Max (mm)
1
Supply Voltage-Max (V)
1.9
Supply Voltage-Min (V)
1.7
Supply Voltage-Nom (V)
1.8
Number of Inverted Outputs
0
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Same Edge Clock Skew Delay-Max (ns)
0.04