Renesas Electronics Corp. ICS95V157YGLF-T | 搜芯易Sourcengine

Renesas Electronics Corp. ICS95V157YGLF-T

生命周期状态
Discontinued
RoHS
符合RoHS标准
REACH
REACH compliant
说明
PLL Based Clock Driver, 10 True Output(s), 0 Inverted Output(s), PDSO48
类别
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Width (mm)
6.1
Length (mm)
12.5
JESD-30 Code
R-PDSO-G48
Package Code
TSSOP
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e3
fmax-Min (MHz)
210
Terminal Finish
MATTE TIN
DLA Qualification
Not Qualified
Temperature Grade
OTHER
Terminal Position
DUAL
Input Conditioning
STANDARD
Number of Functions
1
Number of Terminals
48
Terminal Pitch (mm)
0.5
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
10
Output Characteristics
3-STATE
Seated Height-Max (mm)
1.2
Supply Voltage-Max (V)
2.7
Supply Voltage-Min (V)
2.3
Supply Voltage-Nom (V)
2.5
Number of Inverted Outputs
0
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
0
Same Edge Clock Skew Delay-Max (ns)
0.06