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HD74LV2GT32AUSE

Renesas Electronics Corp.

Renesas Electronics Corp. HD74LV2GT32AUSE
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Family
    LV/LV-A/LVX/H
  • Technology
    CMOS
  • Width (mm)
    2
  • Length (mm)
    2.3
  • JESD-30 Code
    R-PDSO-G8
  • Package Code
    VSSOP
  • Logic IC Type
    OR GATE
  • Package Shape
    RECTANGULAR
  • Package Style
    SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH Meter
  • Surface Mount
    YES
  • Terminal Form
    GULL WING
  • J-STD-609 Code
    e0
  • Packing Method
    TR
  • Schmitt Trigger
    NO
  • Terminal Finish
    Tin/Lead (Sn/Pb)
  • Number of Inputs
    2
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    INDUSTRIAL
  • Terminal Position
    DUAL
  • Number of Functions
    2
  • Number of Terminals
    8
  • Terminal Pitch (mm)
    0.5
  • Load Capacitance (pF)
    50
  • Package Body Material
    PLASTIC/EPOXY
  • Propagation Delay (ns)
    14
  • Seated Height-Max (mm)
    0.9
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    3
  • Supply Voltage-Nom (V)
    3.3
  • Package Equivalence Code
    TSSOP8,.12,20
  • Output Low Current-Max (mA)
    6
  • Operating Temperature-Max (Cel)
    85
  • Operating Temperature-Min (Cel)
    -40
  • Propagation Delay-Max@Nom-Sup (ns)
    14

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HD74LV2GT32AUSE
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HD74LV2GT32AUSE