Renesas Electronics Corp. HD74HC107FPEL | 搜芯易Sourcengine

Renesas Electronics Corp. HD74HC107FPEL

生命周期状态
Discontinued
RoHS
符合RoHS标准
REACH
REACH compliant
说明
J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO14
类别
Semiconductors Logic ICs FF/Latches J-K FLIP-FLOP

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
HC/UH
Technology
CMOS
Width (mm)
5.5
Length (mm)
10.06
JESD-30 Code
R-PDSO-G14
Package Code
SOP
Trigger Type
NEGATIVE EDGE
Logic IC Type
J-K FLIP-FLOP
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE Meter
Surface Mount
YES
Terminal Form
GULL WING
Number of Bits
2
Packing Method
TR
Output Polarity
COMPLEMENTARY
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Number of Functions
2
Number of Terminals
14
Terminal Pitch (mm)
1.27
Load Capacitance (pF)
50
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
190
Seated Height-Max (mm)
2.2
Supply Voltage-Max (V)
6
Supply Voltage-Min (V)
2
Supply Voltage-Nom (V)
4.5
Package Equivalence Code
SOP14,.3
Frequency-Max@Nom-Sup (Hz)
24000000
Moisture Sensitivity Level
1
Output Low Current-Max (mA)
4
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Time@Peak Reflow Temperature-Max (s)
20