EPF6010AFI256-2

Width (mm)

Length (mm)

JESD-30 Code

Organization

Package Code

Package Shape

Package Style

Surface Mount

Terminal Form

J-STD-609 Code

Number of CLBs

Terminal Finish

DLA Qualification

Terminal Position

Number of Terminals

Terminal Pitch (mm)

Number of Logic Cells

Package Body Material

Supply Voltage-Max (V)

Supply Voltage-Min (V)

Supply Voltage-Nom (V)

Programmable Logic Type

Package Equivalence Code

Clock Frequency-Max (MHz)

Number of Equivalent Gates

Operating Temperature-Max (Cel)

Operating Temperature-Min (Cel)

Combinatorial Delay of a CLB-Max (ns)