Intel Corporation EP20K400EFI672-1 | 搜芯易Sourcengine

Intel Corporation EP20K400EFI672-1

生命周期状态
Active
REACH
REACH compliant
说明
Loadable PLD, 1.57ns, CMOS, PBGA672
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices LOADABLE PLD

ECCN
3A991.d
ECCN Governance
EAR
HTS Code
8542.31.00.55
SB Code
8542.31.00.55

Technology
CMOS
Width (mm)
27
Length (mm)
27
JESD-30 Code
S-PBGA-B672
Organization
4 DEDICATED INPUTS, 488 I/O
Package Code
BGA
Package Shape
SQUARE
Package Style
GRID ARRAY Meter
Surface Mount
YES
Terminal Form
BALL
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
TIN LEAD
Number of Inputs
480
DLA Qualification
Not Qualified
Number of Outputs
480
Terminal Position
BOTTOM
Number of I/O Lines
488
Number of Terminals
672
Terminal Pitch (mm)
1
Number of Logic Cells
16640
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
1.57
Seated Height-Max (mm)
2.1
Supply Voltage-Max (V)
1.89
Supply Voltage-Min (V)
1.71
Supply Voltage-Nom (V)
1.8
Programmable Logic Type
LOADABLE PLD
Package Equivalence Code
BGA672,26X26,40
Clock Frequency-Max (MHz)
5000
Number of Dedicated Inputs
4
Operating Temperature-Max (Cel)
100
Operating Temperature-Min (Cel)
-40