Maxim Integrated DS1110-500 | 搜芯易Sourcengine

Maxim Integrated DS1110-500

生命周期状态
Discontinued
说明
Silicon Delay Line, 1-Func, 10-Tap, True Output, CMOS, PDIP14
类别
Semiconductors Logic ICs Delay Lines SILICON DELAY LINE

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Technology
CMOS
Width (mm)
7.62
Length (mm)
19.05
JESD-30 Code
R-PDIP-T14
Package Code
DIP
Logic IC Type
SILICON DELAY LINE
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e0
Output Polarity
TRUE
Terminal Finish
TIN LEAD
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Number of Functions
1
Number of Terminals
14
Terminal Pitch (mm)
2.54
Number of Taps/Steps
10
Total Delay-Nom (ns)
500
Package Body Material
PLASTIC/EPOXY
Seated Height-Max (mm)
4.572
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Programmable Delay Line
NO
Supply Current-Max (mA)
150
Package Equivalence Code
DIP14,.3
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Propagation Delay-Max@Nom-Sup (ns)
500