Analog Devices, Inc. DS1100Z-60+T | 搜芯易Sourcengine

Analog Devices, Inc. DS1100Z-60+T

生命周期状态
Active
RoHS
符合RoHS标准
REACH
REACH compliant
说明
5-Tap Economy Timing Element (Delay Line)
类别
Semiconductors Logic ICs Delay Lines SILICON DELAY LINE

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
1100
Technology
CMOS
Width (mm)
3.9
Length (mm)
4.9
JESD-30 Code
R-PDSO-G8
Package Code
SOP
Logic IC Type
SILICON DELAY LINE
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e3
Packing Method
TR
Output Polarity
TRUE
Terminal Finish
Matte Tin (Sn) - annealed
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Number of Functions
1
Number of Terminals
8
Terminal Pitch (mm)
1.27
Number of Taps/Steps
5
Total Delay-Nom (ns)
60
Package Body Material
PLASTIC/EPOXY
Seated Height-Max (mm)
1.75
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Programmable Delay Line
NO
Supply Current-Max (mA)
50
Package Equivalence Code
SOP8,.25
Moisture Sensitivity Level
1
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Propagation Delay-Max@Nom-Sup (ns)
60
Time@Peak Reflow Temperature-Max (s)
30