Cypress Semiconductor Corporation CY39100V388A-83MGC | 搜芯易Sourcengine

Cypress Semiconductor Corporation CY39100V388A-83MGC

生命周期状态
Discontinued
REACH
REACH compliant
说明
Loadable PLD, 15ns, 1536-Cell, CMOS, PBGA388
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices LOADABLE PLD

ECCN
3A991.d
ECCN Governance
EAR
HTS Code
8542.31.00.55
SB Code
8542.31.00.55

JTAG BST
YES
Technology
CMOS
Width (mm)
35
Length (mm)
35
JESD-30 Code
S-PBGA-B388
Organization
0 DEDICATED INPUTS, 294 I/O
Package Code
BGA
Package Shape
SQUARE
Package Style
GRID ARRAY Meter
Surface Mount
YES
Terminal Form
BALL
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
Tin/Lead (Sn/Pb)
Number of Inputs
294
DLA Qualification
Not Qualified
Number of Outputs
294
Temperature Grade
COMMERCIAL
Terminal Position
BOTTOM
Additional Feature
IT CAN ALSO HAVE AN INPUT VOLTAGE OF 3.3V
Number of I/O Lines
294
Number of Terminals
388
Terminal Pitch (mm)
1.27
Number of Macro Cells
1536
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
15
Seated Height-Max (mm)
2.46
Supply Voltage-Max (V)
2.7
Supply Voltage-Min (V)
2.3
Supply Voltage-Nom (V)
2.5
Programmable Logic Type
LOADABLE PLD
Package Equivalence Code
BGA388,26X26,50
Clock Frequency-Max (MHz)
83
Moisture Sensitivity Level
3
Number of Dedicated Inputs
0
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Time@Peak Reflow Temperature-Max (s)
NOT SPECIFIED