CY37512P352-100BGC
Cypress Semiconductor Corporation
- 生命周期状态Discontinued
- 说明EE PLD, 12ns, 512-Cell, CMOS, PBGA352
- 类别
- ECCN3A991.d
- ECCN GovernanceEAR
- HTS Code8542.31.00.55
- SB Code8542.31.00.55
- JTAG BSTYES
- TechnologyCMOS
- Width (mm)35
- Length (mm)35
- JESD-30 CodeS-PBGA-B352
- Organization5 DEDICATED INPUTS, 269 I/O
- Package CodeBGA
- Package ShapeSQUARE
- Package StyleGRID ARRAY Meter
- Surface MountYES
- Terminal FormBALL
- J-STD-609 Codee0
- Output FunctionMACROCELL
- Terminal FinishTIN LEAD
- Number of Inputs274
- DLA QualificationNot Qualified
- Number of Outputs269
- Temperature GradeCOMMERCIAL
- Terminal PositionBOTTOM
- Additional Feature512 MACROCELLS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
- Number of I/O Lines269
- Number of Terminals352
- Terminal Pitch (mm)1.27
- Number of Macro Cells512
- Package Body MaterialPLASTIC/EPOXY
- In-System ProgrammableYES
- Propagation Delay (ns)12
- Seated Height-Max (mm)2.46
- Supply Voltage-Max (V)5.25
- Supply Voltage-Min (V)4.75
- Supply Voltage-Nom (V)5
- Programmable Logic TypeEE PLD
- Package Equivalence CodeBGA352,26X26,50
- Clock Frequency-Max (MHz)80
- Number of Dedicated Inputs5
- Operating Temperature-Max (Cel)70
- Operating Temperature-Min (Cel)0
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CY37512P352-100BGC