CY37128P84-125JXC
Cypress Semiconductor Corporation
- 生命周期状态Discontinued
- RoHS符合RoHS标准
- 说明EE PLD, 10ns, 128-Cell, CMOS, PQCC84
- 类别
- HTS Code8542.39.00.01
- SB Code8542.31.00.55
- JTAG BSTYES
- TechnologyCMOS
- Width (mm)29.3116
- Length (mm)29.3116
- JESD-30 CodeS-PQCC-J84
- Organization1 DEDICATED INPUTS, 69 I/O
- Package CodeQCCJ
- Package ShapeSQUARE
- Package StyleCHIP CARRIER Meter
- Surface MountYES
- Terminal FormJ BEND
- J-STD-609 Codee3
- Output FunctionMACROCELL
- Terminal FinishMATTE TIN
- Number of Inputs70
- DLA QualificationNot Qualified
- Number of Outputs69
- Temperature GradeCOMMERCIAL
- Terminal PositionQUAD
- Additional Feature128 MACROCELLS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
- Number of I/O Lines69
- Number of Terminals84
- Terminal Pitch (mm)1.27
- Number of Macro Cells128
- Package Body MaterialPLASTIC/EPOXY
- In-System ProgrammableYES
- Propagation Delay (ns)10
- Seated Height-Max (mm)5.08
- Supply Voltage-Max (V)5.25
- Supply Voltage-Min (V)4.75
- Supply Voltage-Nom (V)5
- Programmable Logic TypeEE PLD
- Package Equivalence CodeLDCC84,1.0SQ
- Clock Frequency-Max (MHz)83
- Moisture Sensitivity Level3
- Number of Dedicated Inputs1
- Peak Reflow Temperature (Cel)260
- Operating Temperature-Max (Cel)70
- Operating Temperature-Min (Cel)0
CY37128P84-125JXC有0家供应商货源可供购买或竞价
提交询价
您的询价单将直接发送给我们的销售专家: Pari
提交询价
CY37128P84-125JXC