Renesas Electronics Corp. 87004AG | 搜芯易Sourcengine

Renesas Electronics Corp. 87004AG

生命周期状态
Active
说明
PLL Based Clock Driver
类别
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
87004
Width (mm)
4.4
Length (mm)
7.8
JESD-30 Code
R-PDSO-G24
Package Code
TSSOP
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
Packing Method
TUBE
fmax-Min (MHz)
250
Terminal Position
DUAL
Additional Feature
ALSO OPERATABLE AT 3.3V NOM
Input Conditioning
DIFFERENTIAL MUX
Number of Functions
1
Number of Terminals
24
Terminal Pitch (mm)
0.65
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
4
Output Characteristics
SERIES-RESISTOR
Propagation Delay (ns)
6.9
Seated Height-Max (mm)
1.2
Supply Voltage-Max (V)
2.625
Supply Voltage-Min (V)
2.375
Supply Voltage-Nom (V)
2.5
Supply Current-Max (mA)
100
Package Equivalence Code
TSSOP24,.25
Number of Inverted Outputs
0
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Propagation Delay-Max@Nom-Sup (ns)
6.9
Same Edge Clock Skew Delay-Max (ns)
0.05