74SSTUBH32865ABKG8
Renesas Electronics Corp.
- 生命周期状态EOL
- RoHS符合RoHS标准
- REACHREACH compliant
- 说明28-Bit 1:2 Registered Buffer for DDR2 CABGA 13.00x9.00x1.30 mm 0.65mm Pitch
- 类别
- ECCNEAR99
- ECCN GovernanceEAR
- HTS Code8542.39.00.01
- SB Code8542.39.00.00
- Width9
- FamilySSTU
- Length13
- fmax-Min410 MHz
- Max I(ol)12 Amp
- TechnologyTTL
- JESD-30 CodeR-PBGA-B160
- Package CodeLFBGA
- Trigger TypePOSITIVE EDGE
- JESD-609 Codee1
- Logic IC TypeD FLIP-FLOP
- Package ShapeRECTANGULAR
- Package StyleGRID ARRAY, LOW PROFILE, FINE PITCH Meter
- Surface MountYES
- Terminal FormBALL
- Number of Bits28
- Packing MethodTR
- Terminal Pitch0.65 mm
- Output PolarityTRUE
- Terminal FinishTIN SILVER COPPER
- Seated Height-Max1.3 mm
- Terminal PositionBOTTOM
- Number of Functions1
- Number of Terminals160
- Prop. Delay@Nom-Sup3 ns
- Max Frequency@Nom-Sup410000000 Hz
- Package Body MaterialPLASTIC/EPOXY
- Output CharacteristicsOPEN-DRAIN
- Propagation Delay (tpd)3 ns
- Package Equivalence CodeBGA160,12X18,25
- Operating Temperature-Max70 Cel
- Operating Temperature-Min0 Cel
- Supply Voltage-Max (Vsup)1.9 V
- Supply Voltage-Min (Vsup)1.7 V
- Supply Voltage-Nom (Vsup)1.8 V
- Moisture Sensitivity Level3
- Peak Reflow Temperature (Cel)260
- Power Supply Current-Max (ICC)100 mA
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