74LVTH18512DGG
Texas Instruments Incorporated
- 生命周期状态Discontinued
- 说明Boundary Scan Reg Bus Transceiver, LVT Series, 2-Func, 9-Bit, True Output, CMOS, PDSO64
- 类别
- HTS Code8542.39.00.01
- SB Code8542.39.00.00
- FamilyLVT
- DirectionBIDIRECTIONAL
- TechnologyCMOS
- Width (mm)6.1
- Length (mm)17
- Control TypeINDEPENDENT CONTROL
- JESD-30 CodeR-PDSO-G64
- Package CodeTSSOP
- Trigger TypePOSITIVE EDGE
- Logic IC TypeBOUNDARY SCAN REG BUS TRANSCEIVER
- Package ShapeRECTANGULAR
- Package StyleSMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
- Surface MountYES
- Terminal FormGULL WING
- Number of Bits9
- Number of Ports2
- Output PolarityTRUE
- Temperature GradeINDUSTRIAL
- Terminal PositionDUAL
- Number of Functions2
- Number of Terminals64
- Terminal Pitch (mm)0.5
- Load Capacitance (pF)50
- Package Body MaterialPLASTIC/EPOXY
- Output Characteristics3-STATE WITH SERIES RESISTOR
- Propagation Delay (ns)6.8
- Seated Height-Max (mm)1.2
- Supply Voltage-Max (V)3.6
- Supply Voltage-Min (V)2.7
- Supply Voltage-Nom (V)3.3
- Supply Current-Max (mA)24
- Package Equivalence CodeTSSOP64,.32,20
- Output Low Current-Max (mA)64
- Operating Temperature-Max (Cel)85
- Operating Temperature-Min (Cel)-40
- Propagation Delay-Max@Nom-Sup (ns)6.8
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74LVTH18512DGG