Renesas Electronics Corp. 74FCT388915TCPYG | 搜芯易Sourcengine

Renesas Electronics Corp. 74FCT388915TCPYG

生命周期状态
EOL
RoHS
符合RoHS标准
REACH
REACH compliant
说明
LVCMOS Zero Delay Buffer SSOP 10.20x5.30x1.73 mm 0.65mm Pitch
类别
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Width
5.3
Family
FCT
Length
10.2
fmax-Min
100 MHz
Max I(ol)
32 Amp
Technology
CMOS
JESD-30 Code
R-PDSO-G28
Package Code
SSOP
JESD-609 Code
e3
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
Terminal Pitch
0.65 mm
Terminal Finish
TIN
Seated Height-Max
1.73 mm
Terminal Position
DUAL
Input Conditioning
SCHMITT TRIGGER MUX
Number of Functions
1
Number of Terminals
28
Prop. Delay@Nom-Sup
1.3 ns
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
7
Output Characteristics
3-STATE
Propagation Delay (tpd)
1.3 ns
Package Equivalence Code
SSOP28,.3
Operating Temperature-Max
70 Cel
Operating Temperature-Min
0 Cel
Supply Voltage-Max (Vsup)
3.6 V
Supply Voltage-Min (Vsup)
3 V
Supply Voltage-Nom (Vsup)
3.3 V
Moisture Sensitivity Level
1
Number of Inverted Outputs
1
Same Edge Skew-Max (tskwd)
0.8 ns
Peak Reflow Temperature (Cel)
260
Power Supply Current-Max (ICC)
120 mA