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72103S80J

Integrated Device Technology, Inc.

Integrated Device Technology, Inc. 72103S80J
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.32.00.71
  • SB Code
    8542.32.00.70
  • Technology
    CMOS
  • JESD-30 Code
    S-PQCC-J44
  • Memory Width
    9
  • Package Code
    QCCJ
  • Output Enable
    YES
  • Package Shape
    SQUARE
  • Package Style
    CHIP CARRIER Meter
  • Surface Mount
    YES
  • Terminal Form
    J BEND
  • J-STD-609 Code
    e0
  • Memory IC Type
    OTHER FIFO
  • Operating Mode
    ASYNCHRONOUS
  • Cycle Time (ns)
    100
  • Parallel/Serial
    PARALLEL
  • Terminal Finish
    TIN LEAD
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    COMMERCIAL
  • Terminal Position
    QUAD
  • Memory Organization
    2KX9
  • Number of Functions
    1
  • Number of Terminals
    44
  • Terminal Pitch (mm)
    1.27
  • Access Time-Max (ns)
    80
  • Number of Words Code
    2K
  • Memory Density (bits)
    18432
  • Package Body Material
    PLASTIC/EPOXY
  • Supply Voltage-Nom (V)
    5
  • Number of Words (words)
    2048
  • Standby Current-Max (A)
    0.008
  • Supply Current-Max (mA)
    140
  • Package Equivalence Code
    LDCC44,.7SQ
  • Clock Frequency-Max (MHz)
    10
  • Operating Temperature-Max (Cel)
    70
  • Operating Temperature-Min (Cel)
    0

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72103S80J
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72103S80J