5962-9070101MEA
Texas Instruments Incorporated
- 生命周期状态Active
- 说明High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125
- 类别
- ECCNEAR99
- ECCN GovernanceEAR
- HTS Code8542.39.00.01
- SB Code8542.39.00.00
- FamilyHCT
- TechnologyCMOS
- Width (mm)7.62
- Length (mm)19.56
- JESD-30 CodeR-GDIP-T16
- Package CodeDIP
- Trigger TypePOSITIVE EDGE
- Logic IC TypeJ-KBAR FLIP-FLOP
- Package ShapeRECTANGULAR
- Package StyleIN-LINE Meter
- Surface MountNO
- Terminal FormTHROUGH-HOLE
- J-STD-609 Codee0
- Number of Bits2
- Packing MethodTUBE
- fmax-Min (MHz)20
- Output PolarityCOMPLEMENTARY
- Schmitt TriggerNO
- Terminal FinishTin/Lead (Sn/Pb)
- DLA QualificationQualified
- Temperature GradeMILITARY
- Terminal PositionDUAL
- Number of Functions2
- Number of Terminals16
- Terminal Pitch (mm)2.54
- Load Capacitance (pF)50
- Package Body MaterialCERAMIC, GLASS-SEALED
- Propagation Delay (ns)60
- Seated Height-Max (mm)5.08
- Supply Voltage-Max (V)5.5
- Supply Voltage-Min (V)4.5
- Supply Voltage-Nom (V)5
- Supply Current-Max (mA)0.08
- Package Equivalence CodeDIP16,.3
- Frequency-Max@Nom-Sup (Hz)18000000
- Output Low Current-Max (mA)6
- Operating Temperature-Max (Cel)125
- Operating Temperature-Min (Cel)-55
- Propagation Delay-Max@Nom-Sup (ns)50
- Screening Level / Reference StandardMIL-STD-883
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5962-9070101MEA