PYRAMID SEMICONDUCTOR CORP 5962-8858805LA | 搜芯易Sourcengine

PYRAMID SEMICONDUCTOR CORP 5962-8858805LA

生命周期状态
Active
REACH
REACH compliant
说明
Cache SRAM, 1KX4, 25ns, CMOS, CDIP24
类别
Semiconductors Memory ICs SRAMs CACHE SRAM

ECCN
3A001.a.2.c
ECCN Governance
EAR
HTS Code
8542.32.00.41
SB Code
8542.32.00.40

I/O Type
SEPARATE
Technology
CMOS
Width (mm)
7.62
Length (mm)
30.48
JESD-30 Code
R-CDIP-T24
Memory Width
4
Package Code
DIP
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e0
Memory IC Type
CACHE SRAM
Operating Mode
ASYNCHRONOUS
Parallel/Serial
PARALLEL
Terminal Finish
TIN LEAD
DLA Qualification
Qualified
Temperature Grade
MILITARY
Terminal Position
DUAL
Memory Organization
1KX4
Number of Functions
1
Number of Terminals
24
Terminal Pitch (mm)
2.54
Access Time-Max (ns)
25
Number of Words Code
1K
Memory Density (bits)
4096
Package Body Material
CERAMIC, METAL-SEALED COFIRED
Output Characteristics
3-STATE
Seated Height-Max (mm)
4.013
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Number of Words (words)
1024
Standby Current-Max (A)
0.12
Standby Voltage-Min (V)
4.5
Supply Current-Max (mA)
120
Package Equivalence Code
DIP24,.3
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-55
Screening Level / Reference Standard
MIL-STD-883