Texas Instruments Incorporated 5962-8515301CA | 搜芯易Sourcengine

Texas Instruments Incorporated 5962-8515301CA

生命周期状态
Active
说明
High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset 14-CDIP -55 to 125
类别
Semiconductors Logic ICs FF/Latches J-K FLIP-FLOP

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
HC/UH
Technology
CMOS
Width (mm)
7.62
Length (mm)
19.56
JESD-30 Code
R-GDIP-T14
Package Code
DIP
Trigger Type
NEGATIVE EDGE
Logic IC Type
J-K FLIP-FLOP
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e0
Number of Bits
2
Packing Method
TUBE
fmax-Min (MHz)
23
Output Polarity
COMPLEMENTARY
Terminal Finish
Tin/Lead (Sn/Pb)
DLA Qualification
Qualified
Temperature Grade
MILITARY
Terminal Position
DUAL
Number of Functions
2
Number of Terminals
14
Terminal Pitch (mm)
2.54
Load Capacitance (pF)
50
Package Body Material
CERAMIC, GLASS-SEALED
Propagation Delay (ns)
240
Seated Height-Max (mm)
5.08
Supply Voltage-Max (V)
6
Supply Voltage-Min (V)
2
Supply Voltage-Nom (V)
4.5
Supply Current-Max (mA)
0.08
Package Equivalence Code
DIP14,.3
Frequency-Max@Nom-Sup (Hz)
20000000
Output Low Current-Max (mA)
6
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-55
Propagation Delay-Max@Nom-Sup (ns)
48
Screening Level / Reference Standard
MIL-STD-883
Number of Elements
2