Renesas Electronics Corp. 276PGLF | 搜芯易Sourcengine

Renesas Electronics Corp. 276PGLF

生命周期状态
EOL
RoHS
符合RoHS标准
说明
Triple PLL Field Programmable VCXO Clock Synthesizer TSSOP 5.00x4.40x1.00 mm 0.65mm Pitch
类别
Semiconductors UPs/uCs/Peripheral ICs Clock Generators CLOCK GENERATOR, OTHER

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Width
4.4
Length
5
Technology
CMOS
JESD-30 Code
R-PDSO-G16
Package Code
TSSOP
JESD-609 Code
e3
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
Terminal Pitch
0.65 mm
Terminal Finish
TIN
Seated Height-Max
1.2 mm
Terminal Position
DUAL
Supply Voltage-Max
3.465 V
Supply Voltage-Min
3.135 V
Supply Voltage-Nom
3.3 V
Number of Terminals
16
Package Body Material
PLASTIC/EPOXY
Package Equivalence Code
TSSOP16,.25
Operating Temperature-Max
70 Cel
Operating Temperature-Min
0 Cel
Moisture Sensitivity Level
1
Output Clock Frequency-Max
200 MHz
uPs/uCs/Peripheral ICs Type
CLOCK GENERATOR, OTHER
Peak Reflow Temperature (Cel)
260
Primary Clock/Crystal Frequency-Nom
27 MHz