XCZU27DR-1LFSVE1156I

Xilinx,Inc.

Xilinx,Inc. XCZU27DR-1LFSVE1156I
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.31.00.60
  • J-STD-609 Code
    e1
  • Terminal Finish
    Tin/Silver/Copper (Sn/Ag/Cu)
  • Programmable Logic Type
    FPGA SOC
  • Moisture Sensitivity Level
    4
  • Peak Reflow Temperature (Cel)
    240
  • Time@Peak Reflow Temperature-Max (s)
    30

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