Xilinx,Inc. XCR3064XL-10CS48C | 搜芯易Sourcengine

Xilinx,Inc. XCR3064XL-10CS48C

生命周期状态
Transferred
说明
EE PLD, 10ns, 64-Cell, CMOS, PBGA48
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.39.00.01
SB Code
8542.39.00.00

JTAG BST
YES
Technology
CMOS
Width (mm)
7
Length (mm)
7
JESD-30 Code
S-PBGA-B48
Organization
0 DEDICATED INPUTS, 40 I/O
Package Code
FBGA
Package Shape
SQUARE
Package Style
GRID ARRAY, FINE PITCH Meter
Surface Mount
YES
Terminal Form
BALL
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
TIN LEAD
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
BOTTOM
Additional Feature
YES
Number of I/O Lines
40
Number of Terminals
48
Terminal Pitch (mm)
0.8
Number of Macro Cells
64
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
10
Seated Height-Max (mm)
1.8
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Programmable Logic Type
EE PLD
Package Equivalence Code
BGA48,7X7,32
Clock Frequency-Max (MHz)
95
Moisture Sensitivity Level
3
Number of Dedicated Inputs
0
Peak Reflow Temperature (Cel)
240
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Time@Peak Reflow Temperature-Max (s)
30