Xilinx,Inc. XC73144-12PG184C | 搜芯易Sourcengine

Xilinx,Inc. XC73144-12PG184C

生命周期状态
Discontinued
说明
UV PLD, 30ns, CMOS, CPGA184
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices UV PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

Technology
CMOS
JESD-30 Code
S-CPGA-P184
Organization
0 DEDICATED INPUTS, 120 I/O
Package Code
PGA
Package Shape
SQUARE
Package Style
GRID ARRAY Meter
Surface Mount
NO
Terminal Form
PIN/PEG
Output Function
MACROCELL
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
PERPENDICULAR
Additional Feature
144 MACROCELLS WITH PROGRAMMABLE I/O ARCHITECTURE
Number of I/O Lines
120
Number of Terminals
184
Package Body Material
CERAMIC, METAL-SEALED COFIRED
Propagation Delay (ns)
30
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Programmable Logic Type
UV PLD
Clock Frequency-Max (MHz)
55.6
Number of Dedicated Inputs
0
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0