XC2S100E-6TQ144I

Xilinx,Inc.

Xilinx,Inc. XC2S100E-6TQ144I
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Technology
    CMOS
  • Width (mm)
    20
  • Length (mm)
    20
  • JESD-30 Code
    S-PQFP-G144
  • Organization
    600 CLBS, 37000 GATES
  • Package Code
    LFQFP
  • Package Shape
    SQUARE
  • Package Style
    FLATPACK, LOW PROFILE, FINE PITCH Meter
  • Surface Mount
    YES
  • Terminal Form
    GULL WING
  • J-STD-609 Code
    e0
  • Number of CLBs
    600
  • Terminal Finish
    Tin/Lead (Sn85Pb15)
  • Number of Inputs
    202
  • DLA Qualification
    Not Qualified
  • Number of Outputs
    202
  • Terminal Position
    QUAD
  • Additional Feature
    MAXIMUM USABLE GATES = 100000
  • Number of Terminals
    144
  • Terminal Pitch (mm)
    0.5
  • Number of Logic Cells
    2700
  • Package Body Material
    PLASTIC/EPOXY
  • Seated Height-Max (mm)
    1.6
  • Supply Voltage-Max (V)
    1.89
  • Supply Voltage-Min (V)
    1.71
  • Supply Voltage-Nom (V)
    1.8
  • Programmable Logic Type
    FIELD PROGRAMMABLE GATE ARRAY
  • Package Equivalence Code
    QFP144,.87SQ,20
  • Clock Frequency-Max (MHz)
    357
  • Moisture Sensitivity Level
    3
  • Number of Equivalent Gates
    37000
  • Peak Reflow Temperature (Cel)
    225
  • Operating Temperature-Max (Cel)
    100
  • Operating Temperature-Min (Cel)
    -40
  • Time@Peak Reflow Temperature-Max (s)
    30
  • Combinatorial Delay of a CLB-Max (ns)
    0.47

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