Xilinx,Inc. XC17128L-DD8R | 搜芯易Sourcengine

Xilinx,Inc. XC17128L-DD8R

生命周期状态
Transferred
说明
Configuration Memory, 128KX1, CMOS, CDIP8
类别
Semiconductors Memory ICs EPROMs CONFIGURATION MEMORY

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.71
SB Code
8542.32.00.70

I/O Type
COMMON
Technology
CMOS
JESD-30 Code
R-XDIP-T8
Memory Width
1
Package Code
DIP
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
Memory IC Type
CONFIGURATION MEMORY
DLA Qualification
Not Qualified
Temperature Grade
MILITARY
Terminal Position
DUAL
Memory Organization
128KX1
Number of Terminals
8
Terminal Pitch (mm)
2.54
Number of Words Code
128K
Memory Density (bits)
131072
Package Body Material
CERAMIC
Output Characteristics
3-STATE
Supply Voltage-Nom (V)
3.3
Number of Words (words)
131072
Standby Current-Max (A)
5.0E-5
Supply Current-Max (mA)
5
Package Equivalence Code
DIP8,.3
Clock Frequency-Max (MHz)
10
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-55
Screening Level / Reference Standard
38535Q/M;38534H;883B