W3J512M32KT-800B2M
Microsemi Corporation
- 生命周期状态Discontinued
- REACHREACH compliant
- 说明DDR3L DRAM, 512MX32, 0.4ns, CMOS, PBGA204
- 类别
- ECCNEAR99
- ECCN GovernanceEAR
- HTS Code8542.32.00.36
- SB Code8542.32.00.23
- Width10.1 mm
- Length14.6 mm
- I/O TypeCOMMON
- TechnologyCMOS
- Access ModeSINGLE BANK PAGE BURST
- JESD-30 CodeR-PBGA-B204
- Memory Width32
- Organization512MX32
- Package CodeFBGA
- Self RefreshYES
- Package ShapeRECTANGULAR
- Package StyleGRID ARRAY, FINE PITCH Meter
- Surface MountYES
- Terminal FormBALL
- Memory Density17179869184 bit
- Memory IC TypeDDR3L DRAM
- Operating ModeSYNCHRONOUS
- Refresh Cycles8192
- Terminal Pitch0.8 mm
- Access Time-Max0.4 ns
- Number of Ports1
- Number of Words536870912 words
- Seated Height-Max3.84 mm
- Temperature GradeMILITARY
- Terminal PositionBOTTOM
- Additional FeatureAUTO/SELF REFRESH; LG-MAX; WD-MAX; SEATED HT-CALCULATED
- Supply Current-Max760 mA
- Number of Functions1
- Number of Terminals204
- Standby Current-Max0.072 Amp
- Number of Words Code512M
- Qualification StatusNot Qualified
- Package Body MaterialPLASTIC/EPOXY
- Output Characteristics3-STATE
- Sequential Burst Length8
- Interleaved Burst Length8
- Package Equivalence CodeBGA204,12X17,32
- Operating Temperature-Max125 Cel
- Operating Temperature-Min-55 Cel
- Supply Voltage-Max (Vsup)1.45 V
- Supply Voltage-Min (Vsup)1.283 V
- Supply Voltage-Nom (Vsup)1.35 V
- Clock Frequency-Max (fCLK)400 MHz
W3J512M32KT-800B2M有0家供应商货源可供购买或竞价
提交询价
您的询价单将直接发送给我们的销售专家: Pari
提交询价
W3J512M32KT-800B2M