W3EG2256M72ASSR265JD3SG
WHITE ELECTRONIC DESIGNS CORP
- 生命周期状态Transferred
- RoHS符合RoHS标准
- 说明DDR DRAM Module, 512MX72, 0.75ns, CMOS
- 类别
- ECCNEAR99
- ECCN GovernanceEAR
- HTS Code8542.32.00.36
- SB Code8542.32.00.23
- I/O TypeCOMMON
- TechnologyCMOS
- Access ModeDUAL BANK PAGE BURST
- JESD-30 CodeR-XDMA-N184
- Memory Width72
- Package CodeDIMM
- Self RefreshYES
- Package ShapeRECTANGULAR
- Package StyleMICROELECTRONIC ASSEMBLY Meter
- Surface MountNO
- Terminal FormNO LEAD
- J-STD-609 Codee4
- Memory IC TypeDDR DRAM MODULE
- Operating ModeSYNCHRONOUS
- Refresh Cycles8192
- Number of Ports1
- Terminal FinishGOLD
- DLA QualificationNot Qualified
- Temperature GradeCOMMERCIAL
- Terminal PositionDUAL
- Additional FeatureAUTO/SELF REFRESH
- Memory Organization512MX72
- Number of Functions1
- Number of Terminals184
- Terminal Pitch (mm)1.27
- Access Time-Max (ns)0.75
- Number of Words Code512M
- Memory Density (bits)38654705664
- Package Body MaterialUNSPECIFIED
- Output Characteristics3-STATE
- Supply Voltage-Max (V)2.7
- Supply Voltage-Min (V)2.3
- Supply Voltage-Nom (V)2.5
- Number of Words (words)536870912
- Standby Current-Max (A)0.54
- Supply Current-Max (mA)6600
- Package Equivalence CodeDIMM184
- Clock Frequency-Max (MHz)133
- Operating Temperature-Max (Cel)70
- Operating Temperature-Min (Cel)0
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