MOSEL-VITELIC V437432E24VATG-75 | 搜芯易Sourcengine

MOSEL-VITELIC V437432E24VATG-75

生命周期状态
Discontinued
说明
Synchronous DRAM Module, 32MX72, 5.4ns, CMOS
类别
Semiconductors Memory ICs DRAMs SYNCHRONOUS DRAM MODULE

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.36
SB Code
8542.32.00.23

I/O Type
COMMON
Technology
CMOS
Access Mode
SINGLE BANK PAGE BURST
JESD-30 Code
R-XDMA-N168
Memory Width
72
Organization
32MX72
Package Code
DIMM
Self Refresh
YES
Package Shape
RECTANGULAR
Package Style
MICROELECTRONIC ASSEMBLY Meter
Surface Mount
NO
Terminal Form
NO LEAD
Memory Density
2415919104 bit
Memory IC Type
SYNCHRONOUS DRAM MODULE
Operating Mode
SYNCHRONOUS
Refresh Cycles
8192
Terminal Pitch
1.27 mm
Access Time-Max
5.4 ns
Number of Ports
1
Number of Words
33554432 words
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Additional Feature
AUTO/SELF REFRESH
Supply Current-Max
2160 mA
Number of Functions
1
Number of Terminals
168
Standby Current-Max
0.018 Amp
Number of Words Code
32M
Qualification Status
Not Qualified
Package Body Material
UNSPECIFIED
Output Characteristics
3-STATE
Package Equivalence Code
DIMM168
Operating Temperature-Max
70 Cel
Operating Temperature-Min
0 Cel
Supply Voltage-Max (Vsup)
3.6 V
Supply Voltage-Min (Vsup)
3 V
Supply Voltage-Nom (Vsup)
3.3 V
Clock Frequency-Max (fCLK)
133 MHz