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SN74S409-2N

Advanced Micro Devices, Inc. (AMD)

Advanced Micro Devices, Inc. (AMD) SN74S409-2N
  • HTS Code
    8542.31.00.01
  • SB Code
    8542.31.00.30
  • Technology
    CMOS
  • Width (mm)
    15.24
  • Length (mm)
    61.849
  • JESD-30 Code
    R-PDIP-T48
  • Package Code
    DIP
  • Boundary Scan
    NO
  • Package Shape
    RECTANGULAR
  • Package Style
    IN-LINE Meter
  • Surface Mount
    NO
  • Terminal Form
    THROUGH-HOLE
  • J-STD-609 Code
    e0
  • Low Power Mode
    NO
  • Number of Banks
    4
  • Terminal Finish
    TIN LEAD
  • Address Bus Width
    18
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    COMMERCIAL
  • Terminal Position
    DUAL
  • Memory Organization
    1M X 16
  • Number of Terminals
    48
  • Terminal Pitch (mm)
    2.54
  • Package Body Material
    PLASTIC/EPOXY
  • Seated Height-Max (mm)
    5.715
  • Supply Voltage-Max (V)
    5.25
  • Supply Voltage-Min (V)
    4.75
  • Supply Voltage-Nom (V)
    5
  • External Data Bus Width
    0
  • Supply Current-Max (mA)
    325
  • Package Equivalence Code
    DIP48,.6
  • uPs/uCs/Peripheral ICs Type
    MEMORY CONTROLLER, DRAM
  • Operating Temperature-Max (Cel)
    70
  • Operating Temperature-Min (Cel)
    0

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SN74S409-2N
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SN74S409-2N