MONOLITHIC MEMORIES SN74S408-3L | 搜芯易Sourcengine

MONOLITHIC MEMORIES SN74S408-3L

生命周期状态
Discontinued
说明
DRAM Controller, CMOS, MQCC52
类别
Semiconductors UPs/uCs/Peripheral ICs Memory Controllers MEMORY CONTROLLER, DRAM

HTS Code
8542.31.00.01
SB Code
8542.31.00.30

Technology
CMOS
JESD-30 Code
S-MQCC-N52
Package Code
QCCN
Package Shape
SQUARE
Package Style
CHIP CARRIER Meter
Surface Mount
YES
Terminal Form
NO LEAD
J-STD-609 Code
e0
Terminal Finish
TIN LEAD
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
QUAD
Number of Terminals
52
Terminal Pitch (mm)
1.27
Package Body Material
METAL
Supply Voltage-Nom (V)
5
Supply Current-Max (mA)
285
Package Equivalence Code
LCC52,.75SQ
uPs/uCs/Peripheral ICs Type
MEMORY CONTROLLER, DRAM
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0