MATRA MHS SLCK-67132L-45LH | 搜芯易Sourcengine

MATRA MHS SLCK-67132L-45LH

生命周期状态
Discontinued
说明
Multi-Port SRAM, 2KX8, 45ns, CMOS, CDIP48
类别
Semiconductors Memory ICs SRAMs MULTI-PORT SRAM

ECCN
3A001.a.2.c
ECCN Governance
EAR
HTS Code
8542.32.00.41
SB Code
8542.32.00.40

Technology
CMOS
JESD-30 Code
R-CDIP-T48
Memory Width
8
Package Code
DIP
Output Enable
YES
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
Memory IC Type
MULTI-PORT SRAM
Operating Mode
ASYNCHRONOUS
Number of Ports
2
Parallel/Serial
PARALLEL
DLA Qualification
Not Qualified
Temperature Grade
MILITARY
Terminal Position
DUAL
Additional Feature
ARBITER
Memory Organization
2KX8
Number of Functions
1
Number of Terminals
48
Access Time-Max (ns)
45
Number of Words Code
2K
Memory Density (bits)
16384
Package Body Material
CERAMIC, METAL-SEALED COFIRED
Output Characteristics
3-STATE
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Number of Words (words)
2048
Standby Voltage-Min (V)
2
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-55
Screening Level / Reference Standard
MIL-STD-883 Class B (Modified)