S54S51W
PHILIPS SEMICONDUCTORS
- 生命周期状态Transferred
- 说明AND-OR-Invert Gate, TTL, CDFP14
- 类别
- HTS Code8542.39.00.01
- SB Code8542.39.00.00
- TechnologyTTL
- JESD-30 CodeR-XDFP-F14
- Package CodeDFP
- Logic IC TypeAND-OR-INVERT GATE
- Package ShapeRECTANGULAR
- Package StyleFLATPACK Meter
- Surface MountYES
- Terminal FormFLAT
- J-STD-609 Codee0
- Schmitt TriggerNO
- Terminal FinishTin/Lead (Sn/Pb)
- DLA QualificationNot Qualified
- Temperature GradeMILITARY
- Terminal PositionDUAL
- Number of Terminals14
- Terminal Pitch (mm)1.27
- Package Body MaterialCERAMIC
- Supply Voltage-Nom (V)5
- Supply Current-Max (mA)22
- Package Equivalence CodeFL14,.3
- Output Low Current-Max (mA)20
- Operating Temperature-Max (Cel)125
- Operating Temperature-Min (Cel)-55
- Propagation Delay-Max@Nom-Sup (ns)5.5
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S54S51W