WAFERSCALE INTEGRATION INC PSD412A0-70LI | 搜芯易Sourcengine

WAFERSCALE INTEGRATION INC PSD412A0-70LI

生命周期状态
Transferred
说明
Parallel I/O Port, 40 I/O, CMOS, CQCC68
类别
Semiconductors UPs/uCs/Peripheral ICs Parallel IO Ports PARALLEL IO PORT, GENERAL PURPOSE

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.39.00.01
SB Code
8542.39.00.60

Technology
CMOS
Width (mm)
24.13
Length (mm)
24.13
JESD-30 Code
S-CQCC-J68
Package Code
QCCJ
Package Shape
SQUARE
Package Style
CHIP CARRIER, WINDOW Meter
Surface Mount
YES
Terminal Form
J BEND
Number of Ports
5
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
QUAD
Number of I/O Lines
40
Number of Terminals
68
Package Body Material
CERAMIC, METAL-SEALED COFIRED
Seated Height-Max (mm)
4.57
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
uPs/uCs/Peripheral ICs Type
PARALLEL IO PORT, GENERAL PURPOSE
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40