WAFERSCALE INTEGRATION INC PSD403A1-15J | 搜芯易Sourcengine

WAFERSCALE INTEGRATION INC PSD403A1-15J

生命周期状态
Discontinued
说明
Parallel I/O Port, 40 I/O, CMOS, PQCC68
类别
Semiconductors UPs/uCs/Peripheral ICs Parallel IO Ports PARALLEL IO PORT, GENERAL PURPOSE

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.39.00.01
SB Code
8542.39.00.60

Technology
CMOS
Width (mm)
24.2316
Length (mm)
24.18
JESD-30 Code
S-PQCC-J68
Package Code
QCCJ
Package Shape
SQUARE
Package Style
CHIP CARRIER Meter
Surface Mount
YES
Terminal Form
J BEND
J-STD-609 Code
e0
Number of Ports
5
Terminal Finish
TIN LEAD
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
QUAD
Additional Feature
GENERAL PURPOSE ZPLD
Number of I/O Lines
40
Number of Terminals
68
Terminal Pitch (mm)
1.27
Package Body Material
PLASTIC/EPOXY
Seated Height-Max (mm)
4.57
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
External Data Bus Width
16
Supply Current-Max (mA)
45
Package Equivalence Code
LDCC68,1.0SQ
Clock Frequency-Max (MHz)
34.48
uPs/uCs/Peripheral ICs Type
PARALLEL IO PORT, GENERAL PURPOSE
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0