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PALCE20V8H-20/BLA

Advanced Micro Devices, Inc. (AMD)

PALCE20V8H-20/BLA 产品规格书
Advanced Micro Devices, Inc. (AMD) PALCE20V8H-20/BLA
  • ECCN
    3A001.a.2.c
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.55
  • SB Code
    8542.31.00.55
  • Technology
    CMOS
  • Width (mm)
    7.62
  • Length (mm)
    31.9405
  • Architecture
    PAL-TYPE
  • JESD-30 Code
    R-CDIP-T24
  • Organization
    12 DEDICATED INPUTS, 8 I/O
  • Package Code
    DIP
  • Package Shape
    RECTANGULAR
  • Package Style
    IN-LINE Meter
  • Surface Mount
    NO
  • Terminal Form
    THROUGH-HOLE
  • J-STD-609 Code
    e0
  • Output Function
    MACROCELL
  • Terminal Finish
    TIN LEAD
  • Number of Inputs
    20
  • DLA Qualification
    Not Qualified
  • Number of Outputs
    8
  • Temperature Grade
    MILITARY
  • Terminal Position
    DUAL
  • Additional Feature
    PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET
  • Number of I/O Lines
    8
  • Number of Terminals
    24
  • Terminal Pitch (mm)
    2.54
  • Package Body Material
    CERAMIC, METAL-SEALED COFIRED
  • Propagation Delay (ns)
    20
  • Seated Height-Max (mm)
    5.08
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • Number of Product Terms
    64
  • Programmable Logic Type
    EE PLD
  • Package Equivalence Code
    DIP24,.3
  • Clock Frequency-Max (MHz)
    33.3
  • Number of Dedicated Inputs
    12
  • Operating Temperature-Max (Cel)
    125
  • Operating Temperature-Min (Cel)
    -55
  • Screening Level / Reference Standard
    38535Q/M;38534H;883B

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