PALC22V10-25DMB
Teledyne UK Limited
- 生命周期状态Active
- REACHREACH compliant
- 说明SPLD PAL Family 800 Gates 10 Macro Cells 41.6MHz 5V 24-Pin CDIP
- 类别
- ECCN3A001.a.2.c
- ECCN GovernanceEAR
- HTS Code8542.31.00.55
- SB Code8542.31.00.55
- TechnologyCMOS
- ArchitecturePAL-TYPE
- JESD-30 CodeR-CDIP-T24
- Organization11 DEDICATED INPUTS, 10 I/O
- Package CodeDIP
- Package ShapeRECTANGULAR
- Package StyleIN-LINE Meter
- Surface MountNO
- Terminal FormTHROUGH-HOLE
- Output FunctionMACROCELL
- Number of Inputs22
- Number of Outputs10
- Temperature GradeMILITARY
- Terminal PositionDUAL
- Additional Feature10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS
- Number of I/O Lines10
- Number of Terminals24
- Package Body MaterialCERAMIC
- In-System ProgrammableNO
- Propagation Delay (ns)25
- Supply Voltage-Max (V)5.5
- Supply Voltage-Min (V)4.5
- Supply Voltage-Nom (V)5
- Number of Product Terms132
- Programmable Logic TypeOT PLD
- Clock Frequency-Max (MHz)30.3
- Number of Dedicated Inputs11
- Operating Temperature-Max (Cel)125
- Operating Temperature-Min (Cel)-55
PALC22V10-25DMB有0家供应商货源可供购买或竞价
提交询价
您的询价单将直接发送给我们的销售专家: Pari
提交询价
PALC22V10-25DMB