Lattice Semiconductor MACH221-12JI | 搜芯易Sourcengine

Lattice Semiconductor MACH221-12JI

生命周期状态
Discontinued
说明
EE PLD, 12ns, 96-Cell, CMOS, PQCC68
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
NO
Technology
CMOS
Width (mm)
24.2316
Length (mm)
24.2316
JESD-30 Code
S-PQCC-J68
Organization
2 DEDICATED INPUTS, 64 I/O
Package Code
QCCJ
Package Shape
SQUARE
Package Style
CHIP CARRIER Meter
Surface Mount
YES
Terminal Form
J BEND
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
TIN LEAD
Number of Inputs
66
DLA Qualification
Not Qualified
Number of Outputs
64
Temperature Grade
INDUSTRIAL
Terminal Position
QUAD
Additional Feature
NO
Number of I/O Lines
64
Number of Terminals
68
Terminal Pitch (mm)
1.27
Number of Macro Cells
96
Package Body Material
PLASTIC/EPOXY
In-System Programmable
NO
Propagation Delay (ns)
12
Seated Height-Max (mm)
4.57
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Programmable Logic Type
EE PLD
Package Equivalence Code
LDCC68,1.0SQ
Clock Frequency-Max (MHz)
66.7
Moisture Sensitivity Level
3
Number of Dedicated Inputs
2
Peak Reflow Temperature (Cel)
225
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Time@Peak Reflow Temperature-Max (s)
30