VANTIS CORP M5LV-128/74-12VI | 搜芯易Sourcengine

VANTIS CORP M5LV-128/74-12VI

生命周期状态
Transferred
说明
EE PLD, 12ns, 128-Cell, CMOS, PQFP100
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
YES
Technology
CMOS
JESD-30 Code
S-PQFP-G100
Organization
0 DEDICATED INPUTS, 74 I/O
Package Code
QFP
Package Shape
SQUARE
Package Style
FLATPACK Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
Tin/Lead (Sn/Pb)
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
QUAD
Additional Feature
128 MACROCELLS
Number of I/O Lines
74
Number of Terminals
100
Terminal Pitch (mm)
0.5
Number of Macro Cells
128
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
12
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Programmable Logic Type
EE PLD
Package Equivalence Code
QFP100,.63SQ,20
Clock Frequency-Max (MHz)
47.6
Number of Dedicated Inputs
0
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40