Lattice Semiconductor M5LV-128/68-20YI | 搜芯易Sourcengine

Lattice Semiconductor M5LV-128/68-20YI

生命周期状态
Discontinued
说明
EE PLD, 20ns, 128-Cell, CMOS, PQFP100
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
YES
Technology
CMOS
Width (mm)
14
Length (mm)
20
JESD-30 Code
R-PQFP-G100
Organization
0 DEDICATED INPUTS, 74 I/O
Package Code
QFP
Package Shape
RECTANGULAR
Package Style
FLATPACK Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
TIN LEAD
Number of Inputs
78
DLA Qualification
Not Qualified
Number of Outputs
74
Temperature Grade
INDUSTRIAL
Terminal Position
QUAD
Additional Feature
YES
Number of I/O Lines
74
Number of Terminals
100
Terminal Pitch (mm)
0.65
Number of Macro Cells
128
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
20
Seated Height-Max (mm)
3.4
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Programmable Logic Type
EE PLD
Package Equivalence Code
QFP100,.7X.9
Clock Frequency-Max (MHz)
45.5
Moisture Sensitivity Level
3
Number of Dedicated Inputs
0
Peak Reflow Temperature (Cel)
225
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Time@Peak Reflow Temperature-Max (s)
30