Samsung Semiconductor, Inc. M471B5273BH1-CH9 | 搜芯易Sourcengine

Samsung Semiconductor, Inc. M471B5273BH1-CH9

生命周期状态
Discontinued
RoHS
符合RoHS标准
说明
DDR3 DRAM Module, 512MX64, 0.3ns, CMOS
类别
Semiconductors Memory ICs DRAMs DDR3 DRAM MODULE

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.36
SB Code
8542.32.00.23

I/O Type
COMMON
Technology
CMOS
Access Mode
DUAL BANK PAGE BURST
JESD-30 Code
R-XDMA-N204
Memory Width
64
Organization
512MX64
Package Code
DIMM
Self Refresh
YES
Package Shape
RECTANGULAR
Package Style
MICROELECTRONIC ASSEMBLY Meter
Surface Mount
NO
Terminal Form
NO LEAD
Memory Density
34359738368 bit
Memory IC Type
DDR3 DRAM MODULE
Operating Mode
SYNCHRONOUS
Refresh Cycles
8192
Terminal Pitch
0.6 mm
Access Time-Max
0.3 ns
Number of Ports
1
Number of Words
536870912 words
Temperature Grade
OTHER
Terminal Position
DUAL
Additional Feature
AUTO/SELF REFRESH
Supply Current-Max
2560 mA
Number of Functions
1
Number of Terminals
204
Standby Current-Max
0.192 Amp
Number of Words Code
512M
Qualification Status
Not Qualified
Package Body Material
UNSPECIFIED
Output Characteristics
3-STATE
Package Equivalence Code
DIMM204,24
Operating Temperature-Max
95 Cel
Operating Temperature-Min
0 Cel
Supply Voltage-Max (Vsup)
1.575 V
Supply Voltage-Min (Vsup)
1.425 V
Supply Voltage-Nom (Vsup)
1.5 V
Clock Frequency-Max (fCLK)
667 MHz
Peak Reflow Temperature (Cel)
260