M392T2950CZA-CC
Samsung Semiconductor, Inc.
- 生命周期状态Discontinued
- RoHS符合RoHS标准
- 说明Cache DRAM Module, 128MX72, 0.6ns, CMOS
- 类别
- ECCNEAR99
- ECCN GovernanceEAR
- HTS Code8542.32.00.36
- SB Code8542.32.00.23
- I/O TypeCOMMON
- TechnologyCMOS
- Width (mm)4
- Access ModeSINGLE BANK PAGE BURST
- Length (mm)133.35
- JESD-30 CodeR-XDMA-N240
- Memory Width72
- Package CodeDIMM
- Self RefreshYES
- Package ShapeRECTANGULAR
- Package StyleMICROELECTRONIC ASSEMBLY Meter
- Surface MountNO
- Terminal FormNO LEAD
- J-STD-609 Codee3
- Memory IC TypeCACHE DRAM MODULE
- Operating ModeSYNCHRONOUS
- Refresh Cycles8192
- Number of Ports1
- Terminal FinishMatte Tin (Sn)
- DLA QualificationNot Qualified
- Temperature GradeOTHER
- Terminal PositionDUAL
- Additional FeatureAUTO/SELF REFRESH; WD-MAX
- Memory Organization128MX72
- Number of Functions1
- Number of Terminals240
- Terminal Pitch (mm)1
- Access Time-Max (ns)0.6
- Number of Words Code128M
- Memory Density (bits)9663676416
- Package Body MaterialUNSPECIFIED
- Output Characteristics3-STATE
- Seated Height-Max (mm)18.45
- Supply Voltage-Max (V)1.9
- Supply Voltage-Min (V)1.7
- Supply Voltage-Nom (V)1.8
- Number of Words (words)134217728
- Standby Current-Max (A)0.604
- Supply Current-Max (mA)4510
- Package Equivalence CodeDIMM240,40
- Clock Frequency-Max (MHz)200
- Moisture Sensitivity Level1
- Operating Temperature-Max (Cel)85
- Operating Temperature-Min (Cel)0
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M392T2950CZA-CC