MONOLITHIC MEMORIES M2064-50CN | 搜芯易Sourcengine

MONOLITHIC MEMORIES M2064-50CN

生命周期状态
Discontinued
说明
Field Programmable Gate Array, 50MHz, 64-Cell, CMOS, PDIP48
类别
Semiconductors Programmable Logic ICs Field Programmable Gate Arrays FIELD PROGRAMMABLE GATE ARRAY

HTS Code
8542.39.00.01
SB Code
8542.31.00.60

Technology
CMOS
JESD-30 Code
R-PDIP-T48
Package Code
DIP
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e0
Terminal Finish
Tin/Lead (Sn/Pb)
Number of Inputs
40
DLA Qualification
Not Qualified
Number of Outputs
40
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Number of Terminals
48
Terminal Pitch (mm)
2.54
Number of Logic Cells
64
Package Body Material
PLASTIC/EPOXY
Programmable Logic Type
FIELD PROGRAMMABLE GATE ARRAY
Package Equivalence Code
DIP48,.6
Clock Frequency-Max (MHz)
50
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0