Lattice Semiconductor LC51024MB-75FN672I | 搜芯易Sourcengine

Lattice Semiconductor LC51024MB-75FN672I

生命周期状态
Discontinued
RoHS
符合RoHS标准
说明
EE PLD, 9.5ns, 1024-Cell, CMOS, PBGA672
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

ECCN
3A991.d
ECCN Governance
EAR
HTS Code
8542.31.00.55
SB Code
8542.31.00.55

JTAG BST
YES
Technology
CMOS
Width (mm)
27
Length (mm)
27
JESD-30 Code
S-PBGA-B672
Organization
0 DEDICATED INPUTS, 381 I/O
Package Code
BGA
Package Shape
SQUARE
Package Style
GRID ARRAY Meter
Surface Mount
YES
Terminal Form
BALL
J-STD-609 Code
e1
Output Function
MACROCELL
Terminal Finish
Tin/Silver/Copper (Sn/Ag/Cu)
DLA Qualification
Not Qualified
Terminal Position
BOTTOM
Additional Feature
YES
Number of I/O Lines
381
Number of Terminals
672
Terminal Pitch (mm)
1
Number of Macro Cells
1024
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
9.5
Seated Height-Max (mm)
2.6
Supply Voltage-Max (V)
2.7
Supply Voltage-Min (V)
2.3
Supply Voltage-Nom (V)
2.5
Programmable Logic Type
EE PLD
Package Equivalence Code
BGA672,26X26,40
Moisture Sensitivity Level
3
Number of Dedicated Inputs
0
Peak Reflow Temperature (Cel)
250
Time@Peak Reflow Temperature-Max (s)
40