Samsung Semiconductor, Inc. K4H560838D-NCB3 | 搜芯易Sourcengine

Samsung Semiconductor, Inc. K4H560838D-NCB3

生命周期状态
Discontinued
REACH
REACH compliant
说明
DDR1 DRAM, 32MX8, 0.7ns, CMOS, PDSO54
类别
Semiconductors Memory ICs DRAMs DDR1 DRAM

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.24
SB Code
8542.32.00.15

I/O Type
COMMON
Technology
CMOS
Access Mode
FOUR BANK PAGE BURST
JESD-30 Code
R-PDSO-G54
Memory Width
8
Organization
32MX8
Package Code
SOP
Self Refresh
YES
JESD-609 Code
e0
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE Meter
Surface Mount
YES
Terminal Form
GULL WING
Memory Density
268435456 bit
Memory IC Type
DDR1 DRAM
Operating Mode
SYNCHRONOUS
Refresh Cycles
8192
Terminal Pitch
0.5 mm
Access Time-Max
0.7 ns
Number of Ports
1
Number of Words
33554432 words
Terminal Finish
Tin/Lead (Sn/Pb)
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Additional Feature
AUTO/SELF REFRESH
Supply Current-Max
325 mA
Number of Functions
1
Number of Terminals
54
Standby Current-Max
0.003 Amp
Number of Words Code
32M
Qualification Status
Not Qualified
Package Body Material
PLASTIC/EPOXY
Output Characteristics
3-STATE
Sequential Burst Length
2,4,8
Interleaved Burst Length
2,4,8
Package Equivalence Code
TSSOP54,.36,20
Operating Temperature-Max
70 Cel
Operating Temperature-Min
0 Cel
Supply Voltage-Max (Vsup)
2.7 V
Supply Voltage-Min (Vsup)
2.3 V
Supply Voltage-Nom (Vsup)
2.5 V
Clock Frequency-Max (fCLK)
166 MHz