MATRA MHS IMUI-67204V-55 | 搜芯易Sourcengine

MATRA MHS IMUI-67204V-55

生命周期状态
Discontinued
说明
Bi-Directional FIFO, 4KX9, 55ns, Asynchronous, CMOS, PDSO28
类别
Semiconductors Memory ICs FIFOs BI-DIRECTIONAL FIFO

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.71
SB Code
8542.32.00.70

Technology
CMOS
JESD-30 Code
R-PDSO-J28
Memory Width
9
Package Code
SOJ
Output Enable
NO
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE Meter
Surface Mount
YES
Terminal Form
J BEND
Memory IC Type
BI-DIRECTIONAL FIFO
Operating Mode
ASYNCHRONOUS
Cycle Time (ns)
70
Parallel/Serial
PARALLEL
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Additional Feature
RETRANSMIT; 2V DATA RETENTION
Memory Organization
4KX9
Number of Functions
1
Number of Terminals
28
Access Time-Max (ns)
55
Number of Words Code
4K
Memory Density (bits)
36864
Package Body Material
PLASTIC/EPOXY
Output Characteristics
3-STATE
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Number of Words (words)
4096
Supply Current-Max (mA)
125
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40