IDT74FCT931TT100PV
Integrated Device Technology, Inc.
- 生命周期状态Discontinued
- 说明PLL Based Clock Driver, FCT Series, 17 True Output(s), 0 Inverted Output(s), CMOS, PDSO56
- 类别
- HTS Code8542.39.00.01
- SB Code8542.39.00.00
- FamilyFCT
- TechnologyCMOS
- Width (mm)7.5
- Length (mm)18.415
- JESD-30 CodeR-PDSO-G56
- Package CodeSSOP
- Logic IC TypePLL BASED CLOCK DRIVER
- Package ShapeRECTANGULAR
- Package StyleSMALL OUTLINE, SHRINK PITCH Meter
- Surface MountYES
- Terminal FormGULL WING
- J-STD-609 Codee0
- fmax-Min (MHz)100
- Terminal FinishTIN LEAD
- DLA QualificationNot Qualified
- Temperature GradeCOMMERCIAL
- Terminal PositionDUAL
- Additional FeatureO/P FREQUENCY RATIOS ARE 0.33F/0.5F/1.0F/2.0F/3.0F/4.0F; OUTPUTS ARE ARRANGED IN 3 BANKS
- Input ConditioningMUX
- Number of Functions1
- Number of Terminals56
- Terminal Pitch (mm)0.635
- Load Capacitance (pF)20
- Package Body MaterialPLASTIC/EPOXY
- Number of True Outputs17
- Output Characteristics3-STATE
- Propagation Delay (ns)0.5
- Seated Height-Max (mm)2.794
- Supply Voltage-Max (V)5.25
- Supply Voltage-Min (V)4.75
- Supply Voltage-Nom (V)5
- Package Equivalence CodeSSOP56,.4
- Moisture Sensitivity Level1
- Number of Inverted Outputs0
- Output Low Current-Max (mA)64
- Peak Reflow Temperature (Cel)225
- Operating Temperature-Max (Cel)70
- Operating Temperature-Min (Cel)0
- Same Edge Clock Skew Delay-Max (ns)1
- Time@Peak Reflow Temperature-Max (s)20
IDT74FCT931TT100PV有0家供应商货源可供购买或竞价
提交询价
您的询价单将直接发送给我们的销售专家: Pari
提交询价
IDT74FCT931TT100PV